You are using a deprecated Browser. Internet Explorer is no longer supported by Xilinx.
Zynq-7000 SoC, USB - Adding a dTD to a Primed Endpoint might not get Recognized
The add dTD tripwire semaphore, usb.USBCMD [ATDTW] bit, can cause the controller to ignore a dTD that is added to a primed endpoint.
After the dTD tripwire semaphore is added, the endpoint can remain unprimed even though the software reads the tripwire bit = 1 and the status bit = 1.
Systems that use the USB controller.
|Device Revision(s) Affected:||Refer to (Xilinx Answer 47916) Zynq-7000 Device Advisory Master Answer Record|
Was this Answer Record helpful?
Linked Answer Records
Master Answer Records