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MIG Virtex-6 v3.8 DDR3 - Why do I see 'x' on A12 address line when my test bench is not driving this?
When simulating the MIG Virtex-6 DDR3 design using my own test bench, I see Address Bit A12 as 'X' even though I am not driving this bit in my test bench.
I do not see this problem when using the MIG test bench, only when using my own.
What can cause this?
ddr3_addr is not driven by the user but by MIG and is used for burst chop mode, which is enabled through a mode register during initialization.
A determines (on the fly) whether or not burst chop is used during a READ and WRITE.
If A is not being driven, make sure the following parameter is set properly in the test bench:
constant C0_BURST_MODE : string := "8";
When C0_BURST_MODE is not set correctly in the user test bench, 'X' will be seen for ddr3_addr in simulation.
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- MIG Virtex-6 and Spartan-6