UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 51315

Xilinx MIG 7 Series Solution Center Design Assistant - Hardware usage and debug

Description

This section of the MIG Design Assistant focuses on hardware usage and debug for the MIG 7 Series DDR3/DDR2 designs. Please select from the options below to find information related to your specific question.

NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

(Xilinx Answer 51317) Pin-out and Banking Requirements
(Xilinx Answer 51475) Board Layout and Design Guidelines
(Xilinx Answer 43879) Board Debug - Includes Calibration and Data Error Debug

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51313 Xilinx MIG 7 Series Solution Center - Design Assistant N/A N/A

Child Answer Records

AR# 51315
Date Created 08/24/2012
Last Updated 02/13/2013
Status Active
Type Solution Center
Devices
  • Artix-7
  • Kintex-7
  • Virtex
IP
  • MIG 7 Series