2. Support
  3. AR# 5140: 4.1i FPGA Editor - Hard Macro: Using the Three-State IOB Flip-Flop in XC4000XLA, XC4000XV, and newer architectures
  4. AR# 51403: Virtex-7 GTH Transceivers: CAUI 8-byte FPGA TX interface not supported in Engineering Sample (ES) Silicon

AR# 51403

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Virtex-7 GTH Transceivers: CAUI 8-byte FPGA TX interface not supported in Engineering Sample (ES) Silicon

Description

In the Virtex-7 GTH Initial ES/General ES silicon, the CAUI TX interface (64B/66B or 64B/67B Encoding with GEARBOX_MODE[2] = 1b1) does not support the 8-byte FPGA TX interface with 4-byte internal data width (TX_DATA_WIDTH = 64and TX_INT_DATAWIDTH = 1).

Solution

4-byte FPGA TX interfaces with 4-byte internal data width and CAUI RX interfaces are not affected by this and are supported.
 
The CAUI TX 8-byte interface with 4-byte internal data width is expected to be supported in Production GTH silicon. 
AR# 51403
Date 06/13/2017
Status Active
Type General Article
Devices
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