UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
Page Bookmarked
  1. Xilinx - All Programmable
  2. Support
  3. AR# 51655: 14.2 - SDK - SDK will not let the user program the processor sub-system on Zynq without the program logic configured

AR# 51655

14.2 - SDK - SDK will not let the user program the processor sub-system on Zynq without the program logic configured

Description

In SDK, if the user tries to program the processor sub-system on Zynq devices without the PL being configured, the error message seen below pops up:

bitstream_error.png
bitstream_error.png

How can I work around this?

Solution

The User can work around this by changing the preference on checking for PL configuration. To do this, in SDK go to Window-> Preferences, and clear the checkbox under Xilinx SDK -> Target Manager seen below:

sdk_pl.png
sdk_pl.png

AR# 51655
Date 09/06/2012
Status Active
Type General Article
Tools
  • EDK - 14.2