AR# 51884

Design Advisory for Kintex-7 and Virtex-7 FPGA GTX Production Silicon CDR Attribute Updates

Description

This answer record covers the CDR attribute updates optimized for GTX production silicon. The 7 Series FPGAs Transceivers Wizard v2.3 included with ISE 14.3/Vivado 2012.3 design tools has these optimized settings. For any protocols/applications that use non-scrambled 8B10B encoding such as Gigabit Ethernet, XAUI, CPRI, etc., it is recommended to update to these new values if you are using the GTX wrapper output from earlier versions of the Wizard.

Solution

This table provides the optimized CDR attribute values for non-scrambled 8B/10B encoding-based protocols in GTX production silicon when using LPM equalization mode.

Attribute	Value
RX_DEBUG_CFG	12'h000
	Full-rate: Line rate <= 6.6Gbps (RXOUT_DIV=1)	Half-rate: Line rate 1.6 to 6.25Gbps (RXOUT_DIV=2)	Quarter-rate: Line rate 0.8 to 3.125Gbps (RXOUT_DIV=4)	One-eighth rate: Line rate 0.5 to 1.5625Gbps (RXOUT_DIV=8)
RXCDR_CFG	CDR setting < +/- 200 ppm 72'h03_0000_23FF_1040_0020 CDR setting < +/- 700 ppm 72'h03_8000_23FF_1040_0020 CDR setting < +/- 1250 ppm 72'h03_8000_23FF_1040_0020	CDR setting < +/- 200 ppm 72'h03_0000_23FF_1020_0020 CDR setting < +/- 700 ppm 72'h03_8000_23FF_1020_0020 CDR setting < +/- 1250 ppm 72'h03_8000_23FF_1020_0020	CDR setting < +/- 200 ppm 72'h03_0000_23FF_1010_0020 CDR setting < +/- 700 ppm 72'h03_8000_23FF_1010_0020 CDR setting < +/- 1250 ppm 72'h03_8000_23FF_1010_0020	CDR setting < +/- 200 ppm 72'h03_0000_23FF_1008_0020 CDR setting < +/- 700 ppm 72'h03_8000_23FF_1008_0020 CDR setting < +/- 1250 ppm 72'h03_8000_23FF_1008_0020

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Linked Answer Records

Associated Answer Records

Answer Number	Answer Title	Version Found	Version Resolved
42946	Design Advisory Master Answer Record for Kintex-7 FPGA	N/A	N/A

AR# 51884
Date	10/12/2012
Status	Active
Type	Design Advisory
Devices	Kintex-7 Virtex-7

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