We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Page Bookmarked

AR# 52009

MIG 7 Series DDR3/DDR2 - DQS_BIAS is incorrectly reported as "OFF" on the n-side of the DQS IOBUFDS primitive


Version Found: MIG 1.6

The MIG 7 Series DDR2 and DDR3 designs enable an I/O setting called DQS_BIAS. This is set to "TRUE" on all DQS I/O pairs and can be viewed by looking at the I/O attributes in FPGA Editor ormanually through a design.xdl file. When viewing the DQS I/O setting on an IOBUFDS primitive, the p-side properly displays the DQS_BIAS="TRUE" setting. However, the n-side shows DQS_BIAS="OFF".

This is only an issue for designs that select "OFF" for the "IO Power Reduction" option within the MIG 7 Series tool. The "OFF" selection uses IOBUFDS primitives while "ON" uses IOBUFDS_DCIEN or IOBUFDS_INTERMDISABLE primitives based on HR or HP I/O usage.


While the reporting of DQS_BIAS is incorrect for the n-side of the IOBUFDS DQS I/O pair, the behavior in hardware is correct. This incorrect reporting can be safely ignored.
AR# 52009
Date 02/04/2013
Status Active
Type Known Issues
  • Kintex-7
  • Artix-7
  • Virtex-7
  • MIG 7 Series