In all silicon revisions, the boot process caused by the PS_POR_B reset signal must not be interrupted by the assertion of the PS_SRST_B reset signal.
In pre-production silicon, the system may not lock down securely and the results are unpredictable.
In production silicon, the system will lock down if PS_SRST_B is asserted while the BootROM is executing after a POR reset.
Refer to UG585 TRM v1.7 or later, chapter 6 for a discussion.
The result of this situation is not well defined. The design intention in this situation is to cause a secure lockdown condition.
| Impact: | Minor. |
| Work-around: | The system designer should design and operate their system to ensure that this scenario does not occur. |
| Configurations Affected: | All. |
| Device Revision(s) Affected: | Refer to (Xilinx Answer 47916) Zynq-7000 SoC Silicon Revision Differences. |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 47916 | Zynq-7000 AP SoC Devices - Silicon Revision Differences | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 52847 | Zynq-7000 Board Design - Sequencing for SRST and POR Signals | N/A | N/A |
| AR# 52013 | |
|---|---|
| Date | 05/25/2018 |
| Status | Active |
| Type | Design Advisory |
| Devices | |