The SD cardspecification requires the controller to wait for74clock cycles after the start of the SD clock before issuing the firstCMD0, but the SD card controller only waits 3.5 clock cycles.
During the SD card boot process, the controller starts the SD clock and almost immediately (3.5 SD clocks) issues its first CMD0 command to the SD card. This command may come too quickly for some SD cards to respond. The result during the boot process can be a system hang or an error lockdown situation.
The SD card specification requires a delay of 74 SD clock cycles. Most cards do no require this many clock cycles. Many cards work fine with the 3.5 clock cycledelay.
| Impact: | Minor.. |
Work-around: |
Use a card that works with little or no delay before issuing the CMD0 command.. |
Configurations Affected: |
Systems that usean SD card. |
| Device Revision(s) Affected: | Refer to (Xilinx Answer 47916) - Zynq-7000 Design Advisory Master Answer Record. |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 47916 | Zynq-7000 AP SoC Devices - Silicon Revision Differences | N/A | N/A |
| AR# 52023 | |
|---|---|
| Date | 01/10/2013 |
| Status | Active |
| Type | Design Advisory |
| Devices |
|