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AR# 52233

MIG 7 Series - Vivado fails in GUI mode when debug signals are enabled

Description

Version Found: MIG 7 Series v1.7.a
Version Resolved: See (Xilinx Answer 45195)

MIG 7 Series fails in Vivado GUI mode when the MIG design signals are enabled.

This is a result of the ChipScope cores being inferred as black boxes, and the following error message can be seen:

ERROR: [Opt 31-30] Blackbox CHIPSCOPE_INST.u_cs1 (vio_ain256_aout64_sout64) is driving pin I2 of primitive cell u_my_mig/u_mig_7series_v1_7_rld_memc_ui_top_std_i_2. This blackbox cannot be found in the existing library.

This includes MIG example designs created by using the "Open IP Example Design" option in the Vivado GUI.

Solution

To work around this issue, use the vivado.tcl script generated by MIG and located in the /example_design/par/ and /user_design/par/ directories.

Example command: 

vivado -source vivado.tcl -mode batch

Revision History
10/16/2012 - Initial release

AR# 52233
Date Created 10/05/2012
Last Updated 08/18/2014
Status Active
Type Known Issues
Devices
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series