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AR# 52335

What are the recommended steps to follow to perform bottom-up synthesis using the Vivado Synthesis tool?


What are the recommended steps to follow to perform bottom-up synthesis using the Vivado Synthesis tool?


Starting 2013.1, bottom-up synthesis flow can be automatically set within the tool by selecting any HDL object as a separate Out_of_context module. This is achieved by right-clicking on the HDL object and selecting the "Set as Out-of-Context Module". This will set a new run in the tool which can be executed by right clicking and selecting "Launch Runs". This action sets the lower-level as a top module and runs synthesis on that module without creating I/O buffers.

For detail information on this bottom-up synthesis flow, refer to UG901 starting from 2013.1, and look for "Setting a Bottom Up Flow" (for 2013.1) and "Setting a Bottom Up Flow Using the Out-of-Context Flow" (for 2013.2).

Be careful with this option when the lower level netlist has parameters/generics that control behavior, and in which case this option will take the default values for parameter/generics, so if a module is instantiated twice, or with overriding parameters, this could result in incorrect logic.

Prior 2013.1, the following steps are recommended to be followed when using the Vivado Synthesis tool for bottom-up synthesis:

  1. It is recommended to synthesize the module one at a time manually today when using Vivado Synthesis during bottom-up synthesis.
  2. It is recommended not to set I/O buffers. This can be achieved using -no_iobuf switch, which instructs the tool to not infer any input or output buffers. This can be set either via Vivado IDE or via synth_design TCL command.
  3. Also, if you have the same parameterized module more than once, it is recommended to make the modules unique in order get the modules synthesized during the bottom-up synthesis process.
AR# 52335
Date 10/25/2013
Status Active
Type Known Issues
  • Vivado Design Suite