UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 52421: MIG 7 Series - Support for Vivado IP Upgrade

AR# 52421

MIG 7 Series - Support for Vivado IP Upgrade

Description

MIG 7 Series is currently not supported in the Vivado IP Upgrade flow; when attempting to upgrade a MIG 7 Series design, an error similar to the following is displayed:

import_ip -file /FILES/2012.3/ddr3_32bit.xci -name ddr3_32bit
ERROR: [IP_Flow 19-1670] Failed to copy local file "/FILES/2012.3/mig.prj' while importing IP 'ddr3_32bit'. This is a mandatory source file and must exist for import to be successful. Please ensure this file exists.
ERROR: [Common 17-39] 'import_ip' failed due to earlier errors.

MIG 7 Series IP is going to be supported in the IP Upgrade flow at a later release. In the meantime, this answer record details the flow for upgrading MIG 7 Series IP in the Vivado tools.

Solution

To upgrade a MIG 7 Series core, the "Verify Pin Changes and Update Design" flow within the MIG 7 Series tool must be used. This tool requires a "mig.prj" file from a previous MIG 7 Series generated core and a corresponding UCF file. Currently, this flow does not support uploading XDC files. For more information, see (Xilinx Answer 52419). After the mig.prj and UCF are uploaded, the tool verifies the pin-out and generates an updated MIG 7 Series IP core.
AR# 52421
Date 02/07/2013
Status Active
Type Known Issues
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series

By using this website, I accept the use of cookies.   Learn more

Page Bookmarked