After configuration, it is required that the CPLL and QPLL input reference clocks be active and toggling, and the CPLL/QPLL are powered up (CPLLPD=1b0 and/or QPLLPD=1b0) prior to enabling ACJTAG.
This requirement only applies to the instantiated transceivers. For unconfigured devices or uninstantiated transceivers, there is no requirement.
| AR# 52431 | |
|---|---|
| Date | 04/15/2013 |
| Status | Active |
| Type | General Article |
| Devices |
|