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AR# 52538

Zynq-7000 AP SoC - Boot and Configuration

Description

This answer record helps you find all Zynq-7000 AP SoC solutions related to boot and configuration known issues.

Note: This answer record is part of Xilinx Zynq-7000 AP SoC Solution Center (Xilinx Answer 52512)

The Xilinx Zynq-7000 AP SOC Solution Center is available to address all questions related to Zynq-7000 AP SOC. 

Whether you are starting a new design with Zynq-7000 AP SoC or troubleshooting a problem, use the Zynq-7000 AP SoC Solution Center to guide you to the right information.

Solution

Find all you need to know about booting a Zynq-7000 device

(Xilinx Answer 54760) Zynq-7000 AP SoC - Booting a Zynq-7000 SoC Device

Top Xilinx Answer Records on Boot and Configuration

(Xilinx Answer 47596) Zynq-7000 AP SoC, Boot - Quad-SPI controller, in non-Quad-SPI boot mode, does not drive HOLD_B inactive during SPI data phase [Fixed in Production Silicon] (*)
(Xilinx Answer 50650) ZC702 - The SD card might need to be re-imaged in order to boot
(Xilinx Answer 51787) Zynq-7000 AP SoC - Questions about debug resets
(Xilinx Answer 47588) Zynq-7000, Boot - MultiBoot feature is not supported [Fixed in Production Silicon] (*)
(Xilinx Answer 44330) Zynq-7000, Boot - NAND Boot Width is Limited to 8 Bits [Fixed in Production Silicon] (*)
(Xilinx Answer 47595) Zynq-7000 AP SoC, Boot - Quad-SPI Boot, Image search for dual SS, 8-bit Parallel I/O is performed in 64 KB steps, search range limited to 16 MBs [Fixed in Production Silicon] (*)
(Xilinx Answer 47575) Quad-SPI and SPI RxFIFOs Not Empty Status' are not Updated Promptly
(Xilinx Answer 60978) QSPI Controller Reports Wrong Busy Status Of Flash Memories In Dual Parallel Configuration When Auto CS And Divide by 2 Baud Rate Is Used

(*) Device Revision(s) Affected:
Refer to (Xilinx Answer 47916) Zynq-7000 AP SoC Devices - Silicon Revision Differences

 

Top Xilinx Answer Records on Debugging Programming/Booting

(Xilinx Answer 59174) Zynq-7000 AP SoC: QSPI Programming/Booting Checklist
(Xilinx Answer 59476) Zynq-7000 AP SoC: SD Programming/Booting Checklist
(Xilinx Answer 59311) Zynq-7000 AP SoC: NAND Programming/Booting Checklist

 

Known issues for ISE and VIVADO programming flash tools
 
Xilinx Answer Title

Tool Version Found

Tool Version Resolved
VIVADO (**)
(Xilinx Answer 62731) 2014.4 - SDK Flashwriter - Flashwriter does not program QSPI Flash if an offset is given 2014.4 TBD
(Xilinx Answer 62048) 2014.2 Vivado HW Manager: Cannot configure ZynQ-PL when it is independent mode via JTAG port 2014.2 2015.1
(Xilinx Answer 61308) 2014.2 - SDK Flashwriter - Cannot program the QSPI Flash on Zynq if there is a second device in the JTAG chain  2014.2 2014.3
(Xilinx Answer 60900) Zynq-7000 AP SoC 2014.1 SDK is not able to program the NOR if in NOR boot mode on a production silicon  2014.1 No plan to fix 
(Xilinx Answer 60466) 2014.1 Zynq-7000 SoC AP - NAND programming requires the board to be in JTAG mode 2014.1 No plan to fix 
(Xilinx Answer 60539) 2013.4 SDK and Vivado HW Manager: Failed to program QSPI flashes with 256K and 512K erase sector size 2013.4 2014.3
(Xilinx Answer 55920) Zynq-7000 AP SoC - 2013.3 SDK / 14.7 iMPACT is not able to program the QSPI if in QSPI boot mode on a production silicon 2013.3 2014.1
(Xilinx Answer 59275) Zynq-7000 SoC AP - 2013.3 SDK / 14.7 iMPACT QSPI programming known issues 2013.3 2014.1
(Xilinx Answer 58584) 2013.3 / 2013.4 /14.7 SDK, iMPACT, Zynq-7000 - Indirect Flash program does not work with multiple Zynq devices on JTAG chain 2013.3 2014.3
ISE (**)
(Xilinx Answer 59275) Zynq-7000 SoC AP - 2013.3 SDK / 14.7 iMPACT QSPI programming known issues 14.7 No plan to fix in ISE. Patch provided.
(Xilinx Answer 58584) 2013.3 / 2013.4 /14.7 SDK, iMPACT, Zynq-7000 - Indirect Flash program does not work with multiple Zynq devices on JTAG chain  14.7 No plan to fix in ISE
(Xilinx Answer 55523) 14.5 SDK Flash Writer - Offset option (required for multiboot and fallback flow) does not work 14.5 No plan to fix in ISE.
(Xilinx Answer 56030)
14.5 Zynq-7000 SoC AP Impact - NAND programming requires the board to be in JTAG mode
14.5 No plan to fix in ISE.
(Xilinx Answer 55920) Zynq-7000 AP SoC - 2013.3 SDK / 14.7 iMPACT is not able to program the QSPI if in QSPI boot mode on a production silicon 14.5 No plan to fix in ISE. Patch provided.
(Xilinx Answer 51803) 14.3 SDK/EDK/Impact - Flash programming support on the Avnet ZED board 14.3 See (Xilinx Answer 59275)
(Xilinx Answer 52044) 14.3 Zynq-7000 Impact - Assigning a new file prevents erase/program operations with QSPI indirect programming 14.3 14.4
(Xilinx Answer 52071) 14.x Zynq-7000 SoC AP Impact - QSPI programming on the ZC706 (7045 all silicon revs) requires the board to be in JTAG mode 14.1 See (Xilinx Answer 59275)
(Xilinx Answer 56261) 14.x Zynq-7000 SoC iMPACT - NAND programming with Production Silicon requires the Board to be in JTAG Mode  14.1 No plan to fix
(Xilinx Answer 52143) 14.x Zynq-7000 SoC AP Impact - QSPI programming on the ZC702 (7020 rev1.0 silicon) requires the board to be in QSPI mode 14.1 No plan to fix.
(Xilinx Answer 51235) Zynq-7000 - 14.1/14.2 Xilinx QSPI programming tools (SDK and iMPACT) supports external loopback capable designs 14.1 14.4
(Xilinx Answer 56930) 14.x iMPACT - Zynq-7000 AP SoC Production: PL does not configure if booting from QSPI/NAND/SD/NOR boot mode with invalid image 14.1 No plan to fix.
  
(**) Xilinx recommends to upgrade to ISE 14.7 and refer to (Xilinx Answer 59275) or upgrade to VIVADO 2014.1 (or later).
 
 
 
Known issues for ISE and VIVADO FSBL
 
Xilinx Answer Title
Tool Version Found
Tool Version Resolved
VIVADO
(Xilinx Answer 63576) 2014.4 Zynq-7000 FSBL: After booting with PLL Bypassed (MIO[6]=1) the FSBL doesn't enable the PLL 2014.4 TBD
(Xilinx Answer 61108) 2014.2 - SDK - FSBL crashes when the TRACE port is connected to an external port via the EMIO 2014.2 2014.3
(Xilinx Answer 60755) Zynq-7000 AP SoC 2014.1 Boot failed when EMIO TPIU is enabled 2014.1 2014.3
(Xilinx Answer 59316) 2013.4 FSBL - Fails to boot from SD if the card is write protected (WP is active) 2013.4 2014.1
(Xilinx Answer 59460) 2013.4 FSBL: MD5 Checksum failure for encrypted images 2013.4 2014.1
(Xilinx Answer 63552) 2013.3/14.7 - Zynq FSBL - Issues with fallback image offset handling using MD5 2013.3 2014.3
(Xilinx Answer 56558) 14.6/2013.2 FSBL: Failed to boot from Dual stacked QSPI 2013.2 2013.3
ISE
(Xilinx Answer 58292) 14.7 - XPS - EMIO SD Write Protect and Card Detect Signals Not Properly Configured In Zynq FSBL 14.7 No plan to fix in ISE.
(Xilinx Answer 63552) 2013.3/14.7 - Zynq FSBL - Issues with fallback image offset handling using MD5 14.7 No plan to fix in ISE.
(Xilinx Answer 56948) 14.6 FSBL has Security Risks that need to be addressed 14.6 14.7
(Xilinx Answer 56558) 14.6/2013.2 FSBL: Failed to boot from Dual stacked QSPI 14.6 14.7
(Xilinx Answer 55581) 14.5 SDK - FSBL fails to compile with error "cannot find -lrsa" 14.5 14.6
(Xilinx Answer 55707) 14.5 EDK, Zynq-7000 - FSBL unable to boot when using 32-bit HP AXI ports 14.5 14.6
(Xilinx Answer 51956) Zynq-7000 Example Design - Modify the 14.2 FSBL to load multiple executable partitions 14.2 14.7
(Xilinx Answer 52048) EDK 14.2 Zynq-7000 FSBL - After the axi ports are setup (specifically HP ports), the InitPcap function resets the settings on the HP ports 14.2 14.3
 
Known issues for ISE and VIVADO Bootgen
 
Xilinx Answer Title
Tool Version Found
Tool Version Resolved
VIVADO
(Xilinx Answer 63615) 2014.3 SDK Bootgen:  the user application is at incorrect address when .ARM.exidx section is in the .elf 2014.3 TBD
(Xilinx Answer 63614) 2014.3 SDK Bootgen - Incorrect start address for 3rd party OS application 2014.3 2015.1
(Xilinx Answer 62081) 2014.2/14.7 SDK, Bootgen - Incorrect load address in the partition header 2014.2 2014.3
(Xilinx Answer 61191) 2014.2 - SDK - Bootgen does not auto-populate the FSBL or BIT in SDK 2014.2 2014.2 TBD
(Xilinx Answer 60430) 2014.1/2014.2 SDK Bootgen:  FATAL: Exception: BIT file package is not supported: 7z015clg485 2014.1 2014.3
(Xilinx Answer 58941) 2013.4 SDK - Create Zynq Boot Image Default FSBL/bitstream order is incorrect 2013.4 2014.1
ISE
(Xilinx Answer 62081) 2014.2/14.7 SDK, Bootgen - Incorrect load address in the partition header 14.7 No plan to fix in ISE. Patch provided.
(Xilinx Answer 57763) 14.6 SDK - Create Zynq Boot Image does not create a .nky compatible with iMPACT 14.6 No plan to fix in ISE.
(Xilinx Answer 55562) 14.5 - SDK - Bootgen crashes when relative path is used to specify the location of the BIF 14.5 No plan to fix in ISE.
(Xilinx Answer 56348) 14.5 EDK/SDK - Tools crash when launching bootgen from command line with SDK standalone install 14.5 14.6
(Xilinx Answer 54971) SDK 14.4, Zynq-7000 AP SoC - Specifying explicit offset for data files in BIF generates incorrect .MCS, but correct .BIN 14.4 14.6
(Xilinx Answer 50839) 14.2 EDK/SDK - Advanced settings in Create Boot Image are not auto-populated from previous runs 14.2 No plan to fix in ISE.
 
 

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
52512 Xilinx Zynq-7000 AP SoC Solution Center N/A N/A
52511 Zynq-7000 AP SoC Design Assistant N/A N/A

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
44330 Zynq-7000, Boot - NAND Boot Width is Limited to 8 Bits N/A N/A
47588 Zynq-7000 AP SoC, Boot - MultiBoot feature is not supported N/A N/A
47572 Zynq-7000 AP SoC, Boot IOP - BootROM night hang if a NAND Boot Image is Malformed or Corrupted N/A N/A
47593 Zynq-7000 AP SoC, Boot - During NOR Boot the MIO 2 and MIO 14 pins are Inadvertently Configured by the BootROM N/A N/A
47596 Zynq-7000 AP SoC, Boot - Quad-SPI controller, in non-Quad-SPI boot mode, does not drive HOLD_B inactive during SPI data phase N/A N/A
47595 Zynq-7000 AP SoC, Boot - Quad-SPI Boot, Image search for dual SS, 8-bit Parallel I/O is performed in 64 KB steps, search range limited to 16 MBs N/A N/A
47567 Zynq-7000 AP SoC, Boot - Program Counter (PC) Of CPU1 Points to an Invalid Address when Booting from JTAG N/A N/A
50650 ZC702 - The SD card might need to be re-imaged in order to boot N/A N/A
50991 Zynq-7000 AP SoC - What devices are supported for configuration? N/A N/A
52044 14.3 Zynq-7000 Impact - Assigning a new file prevents erase/program operations with QSPI indirect programming N/A N/A
51803 14.3 SDK, EDK, Impact - Flash programming support on the Avnet ZED board N/A N/A
51787 Zynq-7000 AP SoC - Questions about debug resets N/A N/A
51235 Zynq-7000 - 14.1/14.2 Xilinx QSPI programming tools (SDK and iMPACT) supports external loopback capable designs N/A N/A
52143 14.x Zynq-7000 SoC AP Impact - QSPI programming on the ZC702 (7020 rev1.0 silicon) requires the board to be in QSPI mode N/A N/A
52071 14.x Zynq-7000 SoC AP iMPACT - QSPI programming on the ZC706 (7045 all silicon revs) requires the Zynq device to boot in JTAG mode N/A N/A
51775 Zynq - What is the maximum QSPI frequency for (x1,x2,x4,x8) modes? N/A N/A
51207 14.x - Zynq-7000 AP SoC: When creating a BOOT.bin file with a bitstream that does not have processing_system7, the system does not boot N/A N/A
53180 Zynq - Configuration - Determining the Address of Linux Files During Configuration N/A N/A
54760 Zynq-7000 AP SoC - Booting a Zynq-7000 SoC Device N/A N/A
55920 Zynq-7000 AP SoC - 2013.3 SDK / 14.7 iMPACT is not able to program the QSPI if in QSPI boot mode on a production silicon N/A N/A
AR# 52538
Date Created 11/20/2012
Last Updated 03/11/2015
Status Active
Type Solution Center
Devices
  • Zynq-7000