AR# 52668


Virtex-7 FPGA GTX/GTH Transceivers - Multi-lane buffer bypass not supported across SLR boundary


Some devices in the Virtex-7 family use SSIT (Stacked Silicon Interconnect Technology) and this article discusses GTX/GTH transceiver multi-lane buffer bypass for those SSIT devices.


For SSI-based devices (7V1140T, 7V2000T, 7VH580T, 7VH870T) with GTX/GTH transceivers, TX and RX buffer bypass in multi-lane mode will not be supported across the SLR boundary. All lanes that are part of a multi-lane buffer bypass interface must reside on the same SLR.

This limitation is added to version v1.8 of the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476).

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
41613 7 Series FPGAs GTX/GTH Transceivers - Known Issues and Answer Record List N/A N/A
AR# 52668
Date 04/01/2013
Status Active
Type General Article
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