UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 52771

Zynq-7000 Power - Should MIO Bank 1 voltage selection be pulled High to Vcco_MIO0 or Vcco_MIO1?

Description

In Table 5-3 of the Zynq-7000 PCB Design and Pin Planning Guide (UG933), it states that MIO[8] should be pulled to Vcco_MIO1 to select the voltage for MIO Bank 1.

Is this correct?

Solution

No, this is not correct.

All mode pins are located in MIO bank 0 and need to be pulled to Vcco_MIO0 (when appropriate). Mode pins should never be pulled High to Vcco_MIO1.

Pulling them High to Vcco_MIO1 is potentially damaging to the Zynq device.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
52539 Zynq-7000 AP SoC - Board Design N/A N/A
AR# 52771
Date Created 11/05/2012
Last Updated 11/20/2012
Status Active
Type General Article
Devices
  • Zynq-7000