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AR# 52797

LogiCORE IP Serial RapidIO Gen2 v1.6 - Release Notes and Known Issues for ISE Design Suite 14.4 and Vivado 2012.4

Description

This Release Note and Known Issues Answer Record is for the LogiCORE IP Serial RapidIO Gen2 v1.6 which was released in the ISE 14.4 and Vivado 2012.4 design tools and contains the following information:

  • New Features
  • Supported Devices
  • Resolved Issues
  • Known Issues
  • Other Information

For installation instructions, general CORE Generator tool known issues, and design tool requirements, see the IP Release Notes Guide.

Documentation for this core can be found at:
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_rapidio_do-di-rio-log.htm

Solution

New Features

ISE Design Suite

    • ISE 14.4 design tools support
    • Added support for Artix-7 device
    • Added support for production parts for Kintex-7 and Virtex-7
    • Added support for GES parts for Virtex-7
    • Hardware test of Virtex-7 production part
    • Hardware test of Artix-7 IES parts

Vivado Design Suite

    • 2012.4 tool support
    • Added support for Artix-7 device
    • Added support for production parts for Kintex-7 and Virtex-7
    • Added support for GES parts for Virtex-7
    • Support for Vivado Simulator tool
    • Hardware test of Virtex-7 production part
    • Hardware test of Artix-7 IES parts

Supported Devices

ISE Design Suite

The following device families are supported by the core for this release:

  • Virtex-7 devices:
    • Virtex-7
    • Virtex-7 -2G
    • Virtex-7 XT
    • Virtex-7 Low Voltage (-2L)
  • Kintex-7 devices:
    • Kintex-7
    • Kintex-7 Low Voltage (-2L)
  • Artix-7 devices:
    • Artix-7
    • Artix-7 Lower Power (-2L)
  • Virtex-6 devices:
    • Virtex-6 CXT/LXT/SXT/HXT
    • Virtex-6 Lower Power (-1L) LXT/SXT
Vivado Design Suite

The following device families are supported by the core for this release.

  • Virtex-7 devices:
    • Virtex-7
    • Virtex-7 -2G
    • Virtex-7 XT 
  • Kintex-7 devices:
    • Kintex-7 
    • Kintex-7 Low Voltage (-2L)
  •   Artix-7 devices:
    • Artix-7
    • Artix-7 Low Voltage (-2L)

Resolved Issues

ISE Design Suite

Vivado Design Suite

Known Issues

ISE Design Suite

Vivado Design Suite

    • ChipScope tool support has not been added under the Vivado design tools flow.
    • PlanAhead tool is not a supported flow. All development should be done through the Vivado tool.
    • Some configurations of the design might not meet timing
    • (Xilinx Answer 53542) - Link might train down on 6.25Gbaud x2 and 6.25Gbaud x4 core configurations
    • (Xilinx Answer 53937) - phy_link_reset doesn't work
    • (Xilinx Answer 55340) - Occasional PNAs seen for x1 configurations running with IDLE2
    • (Xilinx Answer 54372) - Support for devices with GTH
Other Information

Revision History

12/18/2012 - Initial release
01/23/2013 - Added (Xilinx Answer 53937)
04/03/2013 - Added (Xilinx Answer 53340)/(Xilinx Answer 54372)

AR# 52797
Date Created 12/17/2012
Last Updated 12/02/2014
Status Active
Type Release Notes
IP
  • Serial RapidIO