AR# 52868


7 Series FPGA GTX Transceivers - Line rate/USRCLK limitation for -1 speed grade in 16-bit data path mode


This answer record discusses the 7 Series FPGA GTX transceivers line rate/USRCLK limitation in a -1 speed grade when a 16-bit data path is used.


The Kintex-7 FPGAs and Virtex-7 FPGAs data sheet: DC and AC switching characteristics (DS182 and DS183) list the supported line rates and USRCLK frequencies for different speed grades (tables 53 and 57).

As the restriction in the data sheet (notes under the tables) indicates, a 16-bit data path can only be used for speeds less than 5 Gb/s in a -1 speed grade. However, ISE 14.2/Vivado 2012.2 or earlier versions of the tools incorrectly allow speeds up to 6.6 Gb/s to be used when using 16-bit data path in -1 speed grade.

The data sheet limitation of only upto 5 Gb/s must be followed and this is fixedin the tools starting fromversion v2.3 of the 7 Series FPGAs Transceivers Wizard in ISE14.3/Vivado 2012.3.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
41613 7 Series FPGAs GTX/GTH Transceivers - Known Issues and Answer Record List N/A N/A
AR# 52868
Date 11/12/2012
Status Active
Type General Article
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