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AR# 52996

Virtex-6 FPGA GTX Transceivers - OOB detect threshold for PCI-Express applications


This answer record discusses about the OOB detect threshold in Virtex-6 GTX transceivers and other system level considerations that mayimpact PCI-Express links.


PCI-Express protocol relies on RXELECIDLE (commonly referred to as OOB - Out Of Band signaling) to identify the absence or presence of valid data.

The OOB detection threshold default (OOBDETECT_THRESHOLD = "011") in Virtex-6 GTX was optimized to provide a single mid-range setting for all use modes. When the incoming signal's differential voltage drops below this level, it is considered as an OOB signal (RXELECIDLE asserted).

The OOB detector circuit uses the average amount of signal into the RX pins to determine detection of OOB based on, if this is over the threshold or under. This threshold depends on many system level considerations such as TX launch amplitude, channel loss and the actual data pattern. Because of the continued focus on reducing power in systems, there has been a trend towards reducing TX amplitude,whichaffects theamount of signal that RX OOB detector circuit receives.This may impact the link margin during link training in a system.

To increase margin during link training, for applications such asPCIe Gen 2,a lower OOB detection threshold settingof OOBDETECT_THRESHOLD = 001 may be used.

This change is recommended for any new PCIe Gen 2 designs in Virtex-6 GTX. It is not necessary to make this changein the existing designs if no low-level fallout was seen during link training due to the OOB detector.

AR# 52996
Date 01/31/2013
Status Active
Type General Article
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6 HXT