The -.100ns/0ns limit is an arbitrary tool limitation.
However, consider checking the board design against the board guidelines in the Zynq-7000 PCB Design and Pin Planning Guide (UG933), as large negative values are not expected when the guidelines are followed.
To work around this, set the value to the lowest possible number and enable training, if available.
The 0ns requirement has recently been added to better match routing constraints of MIG (Memory Interface Generator) board design requirements of the PL.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 53051 | Zynq-7000 SoC - PS DDR Controller | N/A | N/A |