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  1. Xilinx - All Programmable
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  3. AR# 53212: 13.4 ChipScope AXI Monitor - AXI Stream TDATA Width Must Be 32

AR# 53212

13.4 ChipScope AXI Monitor - AXI Stream TDATA Width Must Be 32

Description

CORE Generator fails to create the AXI Monitor core if the AXI Stream TDATA Width is set to any value besides 32.

An error message similar to this one will be given if any other value is selected for TDATA Width:

ERROR:sim - "/.../chipscope_axi_monitor_v3_05_a.vhd" Line 285: Expression has 16 elements ; expected 4
ERROR:sim - Failed executing Tcl generator.

Solution

This is currently a known issue, and it is expected to be fixed in the 14.4 release of the tools.

AR# 53212
Date 12/04/2012
Status Active
Type Known Issues
Tools
  • ChipScope Pro - 13.4
IP
  • ChipScope AXI Monitor