I am attempting to design a video system using the latest Xilinx AXI Video cores and am confused about FSYNC vs. SOF on TUSER for the Video Over AXI Stream protocol that Xilinx now uses for all video IP.
What is Xilinx recommendation for handling frame sync?
Xilinx is currently in a transitional period between XSVI (which used fsync) and Video Over AXI4 Stream (which uses SOF on TUSER) interfaces for video. The older cores used XSVI and the new cores now use Video Over AXI4 Stream protocol.
Much of the confusion is around the AXI VDMA because it now adheres to the Video Over AXI4 Stream specification, but it still supports fsync signals (which is legacy).
Following are some recommendations:
NOTE: If you have an AXI VDMA in your design configured as mentioned above, set the AXI4 Stream to Video Out core in Master timing mode. In this case, synchronization to a VTC generator is achieved through SOF and throttling. If there is no AXI VDMA in the system, set this core in Slave mode.
For more information, see the AXI4-Stream Video IP and System Design Guide (UG934):