AR# 53521: LogiCORE IP Tri-Mode Ethernet MAC v5.4 and earlier - RGMII_TX_ER incorrect timing at 10/100 speeds
AR# 53521
LogiCORE IP Tri-Mode Ethernet MAC v5.4 and earlier - RGMII_TX_ER incorrect timing at 10/100 speeds
Description
When using the Tri-Mode Ethernet MAC v5.4 and earlier with 10/100M RGMII mode, incorrect timing can be seen for the Tx Error output.
If a Tx error is asserted, rgmii_tx_ctl does not go low until 2 ns after the falling edge of the rgmii tx clock: rgmii_txc.
In this case, rgmii_tx_ctl should be going low 2 ns before the falling edge of rgmii_txc.
In the case of Tx enable, rgmii_tx_ctl is correctly asserted and de-asserted 2 ns before the rising edge.
Solution
A Tx Error will only be output by the core if the user underruns the transmitted frame.
The transmitted underrun frame will not have a correct FCS appended to the frame and should be flagged as a bad frame by the receiver due to an FCS error.
This timing issue should not result in a bad frame being missed by the receiver.
The rgmii_tx_ctl timing for a Tx error has been corrected in the v5.5 Tri-Mode Ethernet MAC core.
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AR# 53521
Date
11/18/2014
Status
Active
Type
General Article
IP
Tri-Mode Ethernet MAC
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