How many cycles do the crc_err_a and crc_err_b remain asserted for?
According to the following documentation, it is only asserted for one cycle, but the code appears to be for one line?
The crc_err_a and crc_err_b are asserted for each line in which a CRC error is detected.
The CRC is only sent once per line, and only checked once per line.
Please see (Xilinx Answer 40473) for a detailed list of LogiCORE IP Triple Rate SDI Release Notes and Known Issues.
Please see (Xilinx Answer 42805) for a detailed list of LogiCORE IP Spartan-6 FPGA Triple-Rate SDI Release Notes and Known Issues.
Please see (Xilinx Answer 50905) for a detailed list of LogiCORE IP SMPTE SD/HD/3G-SDI Release Notes and Known Issues.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 42805 | LogiCORE IP Spartan-6 FPGA Triple-Rate SDI (Serial Digital Interface) - Release Notes and Known Issues | N/A | N/A |
| 50905 | LogiCORE IP SMPTE SDI (SD/HD/3G-SDI) - Release Notes and Known Issues | N/A | N/A |
| 40473 | LogiCORE IP Triple-Rate SDI (Serial Digital Interface) Virtex-6 - Release Notes and Known Issues | N/A | N/A |
| 54531 | LogiCORE IP SMPTE SD/HD/3G-SDI (SMPTE SDI) - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions | N/A | N/A |
| AR# 53522 | |
|---|---|
| Date | 08/26/2014 |
| Status | Active |
| Type | General Article |
| IP | |