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AR# 53582

Vivado 2012.3 - QSPI x4 configuration triggers a bit generation bug


Bitstream generation is incorrect when setting "set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current design]." The bit cannot inbe used to properly program a FPGA in x4 mode.


This isbecause write_bitstream will not include thecorrect SPI read command if we do not explicitly set SPI_32bit_addr option to either "No" or "Yes."This issue is resolvedin 2012.4.

To work around the issue in2012.3, add the following to project:

(1) set_property BITSTREAM.CONFIG.SPI_32bit_addr No [current_design]
(2) Regenerate the bitstream

AR# 53582
Date 01/25/2013
Status Active
Type General Article
  • Kintex-7
  • Vivado - 2012.3
Boards & Kits
  • Kintex-7 FPGA KC705 Evaluation Kit
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