We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 5391

JTAG - What is the JTAG CLAMP instruction?


What is the JTAG CLAMP instruction?


The CLAMP instruction is an optional JTAG IEEE 1149.1 instruction which is available in the 9500xl family. This instruction sets the outputs of the cpld to logic levels specified in the Boundary Scan register, while the bypass register is connected from TDI to TDO.

AR# 5391
Date 12/15/2012
Status Active
Type General Article