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AR# 54006

Vivado Synthesis - How to set the path for Verilog "include" files?

Description

How can I define the correct path for my Verilog "include" files with Vivado Synthesis?

Solution

The following methods can be used to define the location of an include file:

  • Placing the include file In the same directory as the HDL file with the include statement
  • Setting the path in the HDL `include statement relative to the name of the Synth folder (synth_1, synth_2 etc., whichever is applicable to the run) within the .runs directory.

Project (GUI) mode:

  • Use the Verilog Include Files Search Paths:

Select Tools > Settings > General > Verilog options > Verilog Include Files Search Paths

Non-project mode:

  • Using the "-include_dirs" option for Vivado Synthesis. 

This can be entered as a command line option by passing the -include_dirs option to the synth_design Tcl command.

"-include_dirs /home/project_1/include_directory/" - Full Path.

"-include_dirs ../../includes" - Relative Path from the name of the Synth folder (synth_1, synth_2 etc., whichever is applicable to the run) within the .runs directory.

AR# 54006
Date 02/12/2018
Status Active
Type Known Issues
Tools
  • Vivado Design Suite
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