Xilinx strongly recommends migrating to Vivado Design Suite for new designs using 7 series and newer devices.
All of the new Aurora IP releases will mainly target Vivado tools.
For ISE users to get the latest core, the suggested approach is to generate the design/RTL from Vivado, then implement it through ISE tools.
Also, you will need to create the .ucf manually.
Please note that the latest Aurora IP ISE release was "14.3".
2/5/2013 - Initial Release