This answer record contains the Release Notes and Known Issues for the Aurora 8B10B Core and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and forward.
Please refer to XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.
Aurora 8B/10B LogiCORE IP Page:
https://www.xilinx.com/content/xilinx/en/products/intellectual-property/aurora8b10b.html
General Information
Supported devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado tools.
Changes in v11.1 Rev5:
Changes in v11.1 Rev4:
Changes in v11.1 Rev2:
Changes in v11.1 Rev1:
Changes in v11.1:
Changes in v11.0 (Rev7):
Changes in v11.0 (Rev6):
Changes in v11.0 (Rev5):
Changes in v11.0 (Rev4):
Changes in v11.0 (Rev3):
Changes in v11.0 (Rev. 2):
Changes in v11.0 (Rev1):
Changes in v11.0:
Changes in v10.3:
Change in v10.2:
Change in v10.1:
Change in v10.0:
Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
Core Version | Vivado Tools Version |
---|---|
v11.1Rev5 | 2018.2 |
v11.1Rev4 | 2018.1 |
v11.1 Rev3 | 2017.4 |
v11.1 Rev2 | 2017.3 |
v11.1 Rev1 | 2017.2 |
v11.1 | 2017.1 |
v11.0 Rev7 | 2016.4 |
v11.0 Rev6 | 2016.3 |
v11.0 Rev5 | 2016.2 |
v11.0 Rev4 | 2016.1 |
v11.0 Rev3 | 2015.4.2 |
v11.0 Rev3 | 2015.4.1 |
v11.0 Rev3 | 2015.4 |
v11.0 Rev2 | 2015.3 |
v11.0 Rev1 | 2015.2.1 |
v11.0 Rev1 | 2015.2 |
v11.0 | 2015.1 |
v10.3 Rev2 | 2014.4.1 |
v10.3 Rev1 | 2014.4 |
v10.3 | 2014.3 |
v10.2 (Rev. 1) | 2014.2 |
v10.2 | 2014.1 |
v10.1 | 2013.4 |
v10.0 | 2013.3 |
v9.1 | 2013.2 |
v9.0 | 2013.1 |
v8.3 Rev1 | 2012.4 |
General Guidance
The table below provides answer records for general guidance when using the LogiCORE IP Aurora 8B10B core.
Answer Record | Title | Version Found | Version Resolved |
---|---|---|---|
(Xilinx Answer 65906) | Aurora 8B10B v11.0 - 4-byte core fails in simulation during elaboration stage | v11.0 | v11.0 Rev3 |
(Xilinx Answer 64793) | Design Advisory for Aurora 8B10B v11.0 (or) earlier - Artix-7 GTP - Simplex RX core is not de-asserting MMCM Reset and as a result RXRESETDONE is not HIGH | v11.0 | v11.0 Rev1 |
(Xilinx Answer 66696) | Aurora 8B10B v11.0Rev2 or later - UltraScale - RXLPMEN needs to be set to enable LPM | v11.0 Rev2 or later | v11.0 Rev4 |
Timing is not met between channel bonding signals in Artix-7 GTP | v9.0 | ||
(Xilinx Answer 64173) | Aurora 64B66B/Aurora 8B10B - 7 series GTH - DFE incorrectly set to HOLD after adaptation in Vivado 2013.4 to 2014.4.1 | v10.1 | v11.0 |
(Xilinx Answer 58030) | LogiCORE IP Aurora 8B10B v9.0 or earlier - Incorrect values for CLK_COR_MIN_LAT/CLK_COR_MAX_LAT attributes | v9.0 or earlier | v10.0 |
(Xilinx Answer 58464) | LogiCORE Aurora 8B10B v9.0 or earlier - Update to 7 series GTX Transceiver port RXDFEXYDEN | v9.0 or earlier | v9.1 |
(Xilinx Answer 58745) | No CHANNEL_UP assertion in Aurora 8B10B v10.1 core in Simplex timer mode | v10.1 | v10.2 |
(Xilinx Answer 58079) | LogiCORE IP Aurora 8B10B v10.0 - Recommended Procedure to Target Aurora 8B10B to Zynq 7015 Device | v10.0 | v10.2 |
(Xilinx Answer 58464) | LogiCORE IP Aurora 8B10B v9.1 or earlier - Update to 7 Series GTX Transceiver Port RXDFEXYDEN | v9.1 or earlier | v10.0 |
(Xilinx Answer 58746) | No CHANNEL_UP assertion in Aurora 8B10B v10.1 core in duplex configuration | v10.1 (or) earlier | v10.2 |
(Xilinx Answer 57061) | 2013.2 Vivado - Aurora 8B10B OOC XDC uses lower case and the core has upper cases which causes critical warning when using the DCP | v9.1 | v10.0 |
(Xilinx Answer 60737) | Aurora 8B10B v10.2 - Channel Up & Lane Up toggles for 4 byte Aurora 8b10b cores with lanes >13 | v10.2 | v10.2Rev1 |
(Xilinx Answer 60743) | Aurora 8B10B v10.2 GUI - Validation failed for parameter C_GT_CLOCK1 error in second tab | v10.2 | v10.2Rev1 |
(Xilinx Answer 60832) | Aurora 8B10B v10.2 - UltraScale - Hold violations with few core configurations | v10.2 | v10.2Rev1 |
(Xilinx Answer 61229) | Aurora 64B66B/Aurora 8B10B - UltraScale GTH - CPLL Duplex designs do not have lane_up/channel_up asserted in hardware | v9.2 or later | v10.3 |
(Xilinx Answer 60836) | Aurora 8B10B - Vivado 2013.4 and earlier - GTP and GTH - Production reset DRP sequence could get in hung state that requires reconfiguration to recover | v10.0 or later | v10.3 |
(Xilinx Answer 61230) | Aurora 8B10B v10.2/v10.2Rev1 - UltraScale GTH - Some of the Aurora 8b10b core configurations are failing with slack timing violation | v10.2 | v10.3 |
(Xilinx Answer 61222) | UltraScale - Aurora 8B10B v10.2 Rev1 - Simplex design failed with IES simulator | v10.2 Rev1 | v10.3 |
(Xilinx Answer 61224) | Aurora 8B10B v10.2 - Latches inferred in CRC module | v10.2 | v10.2 Rev1 |
(Xilinx Answer 61302) | Aurora 8B10B v10.0 - Channel up is not asserted with some configurations | v10.0 | v10.2 |
(Xilinx Answer 60831) | Aurora 8B10B - Slow simulation run time with Artix-7 GTP and Virtex-7 GTH | ||
(Xilinx Answer 61378) | Aurora 8B10B v10.1 or earlier - WARNING: [Synth 8-327] inferring latch for variable 'storage_31_reg' | v10.1 or earlier | v10.2 |
Revision History
06/25/2018 04/04/2018 | Updated the details about v11.1 Rev5 Updated the details about v11.1 Rev3 and v11.1 Rev4 |
09/27/2017 | Updated the details about v11.1 Rev1 and v11.1 Rev2 |
03/17/2017 | Updated the details about v11.1 |
02/20/2017 | Updated the details about v11.0 Rev7/td> |
05/10/2016 | Updated the details about v11.0 Rev6 |
05/31/2016 | Updated the details about v11.0 Rev5 |
03/30/2016 | Updated the details about v11.0 Rev4 |
12/30/2015 | Updated the details about v11.0 Rev3 |
09/16/2015 | Updated the details about v11.0 Rev2 |
06/12/2015 | Updated the details about v11.0 Rev1 |
05/12.2015 | Updated Known and Resolved issues table |
03/10/2015 | Updated the details about v10.3Rev2 and v11.0 |
11/26/2014 | Updated the details about v10.3 Rev1, known and Resolved issues |
09/30/2014 | Updated the details about v10.3, known and Resolved issues |
06/23/2014 | Updated known and Resolved issues |
06/19/2014 | Updated details about v10.2 (Rev. 1) |
01/20/2014 | Updated the details about v10.2 |
03/14/2014 | Updated known issue Answer Records |
01/20/2014 | Updated the details about v10.1 |
10/23/2013 | Updated the details about v10.0 |
08/08/2013 | Updated the details about v9.1 |
03/27/2013 | Initial release |