This answer record contains the Release Notes and Known Issues for the LogiCORE IP 3GPP Mixed Mode Turbo Decoder core and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.
LogiCORE IP 3GPP Mixed Mode Turbo Decoder core IP Page:
http://www.xilinx.com/content/xilinx/en/products/intellectual-property/ef-di-mm-tcc-dec.html
General Information
Supported Devices can be found in the following locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.
Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
| Core Version | Vivado Tools Version |
|---|---|
| v2.0(Rev. 12) | 2016.3 |
| v2.0(Rev. 11) | 2016.2 |
| v2.0(Rev. 11) | 2016.1 |
| v2.0(Rev. 10) | 2015.4.2 |
| v2.0(Rev. 10) | 2015.4.1 |
| v2.0(Rev. 10) | 2015.4 |
| v2.0(Rev. 9) | 2015.3 |
| v2.0(Rev. 8) | 2015.2 |
| v2.0(Rev. 8) | 2015.1 |
| v2.0(Rev. 7) | 2014.4.1 |
| v2.0(Rev. 7) | 2014.4 |
| v2.0(Rev. 6) | 2014.3 |
| v2.0(Rev. 5) | 2014.2 |
| v2.0(Rev. 4) | 2014.1 |
| v2.0(Rev. 3) | 2013.4 |
| v2.0(Rev. 2) | 2013.3 |
| v2.0(Rev. 1) | 2013.2 |
| v2.0 | 2013.1 |
General Guidance
The table below provides Answer Records for general guidance when using the LogiCORE IP 3GPP Mixed Mode Turbo Decoder core.
| Answer Record | Title |
|---|---|
| N/A | N/A |
Known and Resolved Issues
The following table provides known issues for the LogiCORE IP 3GPP Mixed Mode Turbo Decoder core, starting with v2.0, initially released in Vivado 2013.1.
Note: The "Version Found" column lists the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
| Answer Record | Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 75617) | The core is unresponsive in simulation with Questa/ModelSim | 2020.1.1 | N/A |
| (Xilinx Answer 60728) | Simulating the core with VCS version I-2014.03 will fail | v2.0 (Rev. 5) | N/A |
| (Xilinx Answer 57927) | Why does the core output incorrect data with Cadence IES 12.20.016? | v2.0 (Rev. 2) | N/A |
Revision History
| 10/14/2020 | Added (Xilinx Answer 75617) |
| 05/20/2014 | Added v2.0 (Rev. 3) and v2.0 (Rev. 4) and v2.0 (Rev. 5) to Version Table and (Xilinx Answer 60728) |
| 10/11/2013 | Added (Xilinx Answer 57927) |
| 04/03/2013 | Initial Release |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 57927 | LogiCORE 3GPP Mixed Mode Turbo Decoder v2.0 (Rev. 2) - Why does the core output incorrect data with Cadence IES 12.20.016? | N/A | N/A |
| 60728 | LogiCORE IP 3GPP Mixed Mode Turbo Decoder v2.0(Rev.5) - Simulating the core with VCS version I-2014.03 will fail | N/A | N/A |
| AR# 54471 | |
|---|---|
| Date | 10/21/2020 |
| Status | Active |
| Type | Release Notes |
| Tools | |
| IP | |