This answer record contains the Release Notes and Known Issues for the LogiCORE IP Divider Generator core and includes the following:
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.
LogiCORE IP Divider Generator core IP Page:
Supported Devices can be found in the following three locations:
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
|v5.1 (Rev. 9)||2015.4|
|v5.1 (Rev. 8)||2015.3|
|v5.1 (Rev. 7)||2015.2.1|
|v5.1 (Rev. 7)||2015.2|
|v5.1 (Rev. 6)||2015.1|
|v5.1 (Rev. 5)||2014.4.1|
|v5.1 (Rev. 5)||2014.4|
|v5.1 (Rev. 4)||2014.3|
|v5.1 (Rev. 3)||2014.2|
|v5.1 (Rev. 2)||2014.1|
|v5.1 (Rev. 1)||2013.4|
|v5.0 (Rev. 1)||2013.2|
The table below provides Answer Records for general guidance when using the LogiCORE IP Divider Generator core.
|Article Number||Article Title|
Known and Resolved Issues
The following table provides known issues for the LogiCORE IP Divider Generator core, starting with v5.0, initially released in Vivado 2013.1.
Note: The "Version Found" column lists the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Answer Record||Title||Version Found||Version Resolved|
|(Xilinx Answer 62404)||Divider Generator v5.1 - Outputs incorrect in sim when data is uninitialized||2013.3||2014.3|
|(Xilinx Answer 62405)||Divider Generator v5.1 - Divider core with Clocks per division option 1 taking longer times to implement||2013.3||Roadmap|