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AR# 54547

LogiCORE IP SMPTE UHD-SDI - Release Notes and Known Issues for the Vivado 2015.1 tool and later versions

Description

This answer record contains the Release Notes and Known Issues for the SMPTE UHD-SDI Core and includes the following:

  • General Information
  • Known and Resolved Issues
  • Revision History

This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2015.1 and later versions.

SMPTE UHD-SDI LogiCORE IP Page:

https://www.xilinx.com/products/intellectual-property/uhd-serial-digital-interface.html

Solution

General Information

Supported Devices can be found in the following three locations:

For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.

Version Table

This table correlates the core version to the first Vivado design tools release version in which it was included.


Core VersionVivado Tools VersionIP ChangelogIP Patches
v1.0 (Rev. 5)2017.3(Xilinx Answer 69903)
v1.0 (Rev. 4)2017.1(Xilinx Answer 69055)
v1.0 (Rev. 3)2016.3(Xilinx Answer 68021)(Xilinx Answer 68741)
v1.0 (Rev. 2)2016.1(Xilinx Answer 66930)
v1.0 (Rev. 1)2015.3(Xilinx Answer 65570)
v1.02015.1


General Guidance

The table below provides Answer Records for general guidance when using the SMPTE UHD-SDI core.


Article NumberArticle Title
(Xilinx Answer 62645)Can non-standard resolutions be supported?
(Xilinx Answer 65953)How do I map RGB data to the SMPTE SD/HD/3G-SDI Core?


Known and Resolved Issues

The following table provides known issues for the SMPTE UHD-SDI core, starting with v1.0, initially released in Vivado 2015.1.

Note: The "Version Found" column lists the version where the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.


Article NumberArticle TitleVersion FoundVersion Resolved
(Xilinx Answer 67862)Why am I not able to properly detect 1920x1080 at 40/48fps (either 3G or 6G) or 3840x2160 at 48fps (12G) inputs?v1.0 (Rev. 2)v1.0 (Rev. 3)
(Xilinx Answer 68754) Why do rx_mode_locked and rx_t_locked keep toggling when an SDI cable is not connectedv1.0 (Rev. 3)v1.0 (Rev. 4)
(Xilinx Answer 68794) UHD-SDI core shows Timing Errors on EDH TX pathsv1.0 (Rev. 3)v1.0 (Rev. 4)
(Xilinx Answer 67742)XAPP1248 - Synthesis of the UHD-SDI core in 2016.2 is preventing the receiver from locking to the incoming video N/AN/A
(Xilinx Answer 66734)Why can I not target a Virtex UltraScale part with GTHs?v1.0v1.0 (Rev. 2)
(Xilinx Answer 56449)rx_locked occasionally asserting when no SDI cable is connectedv1.0

Revision History:

05/01/2018Added (Xilinx Answer 62645)
04/04/2018Added v1.0 (Rev. 3), v1.0 (Rev. 4) and v1.0 (Rev. 5) to the Version Table and (Xilinx Answer 67862)
08/24/2016Added (Xilinx Answer 67742)
06/22/2016Added (Xilinx Answer 56449) and (Xilinx Answer 65953)
04/06/2016Added (Xilinx Answer 66734) and added v1.0 (Rev. 1) and v1.0 (Rev. 2) to Version Table

Linked Answer Records

Master Answer Records

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
64007 LogiCORE IP SMPTE UHD-SDI - How do I adjust the MGTAVCC to 1.05V on the KC705 with -3 Silicon, in order to support 12G-SDI? N/A N/A
64273 LogiCORE IP SMPTE UHD-SDI - Does the IP support the Synchronous Switching feature of the SMPTE-SDI standard? N/A N/A
65450 LogiCORE UHD-SDI - Why do the comments in the x7gtx_uhdsid_control.v file in XAPP1249 v1.1 say that the DRP does not need to be connected for a TX-Only solution? N/A N/A
66734 LogiCORE IP SMPTE UHD-SDI - Why can I not target a Virtex UltraScale part with GTHs? N/A N/A
65953 LogiCORE IP SMPTE SD/HD/3G-SDI (SMPTE SDI) - How do I map RGB data to the SMPTE SD/HD/3G-SDI Core? N/A N/A
67742 LogiCORE IP SMPTE UHD-SDI v1.0 - Synthesis of the UHD-SDI core in Vivado 2016.2 is preventing the receiver from locking to the incoming video N/A N/A
68741 LogiCORE IP SMPTE UHD-SDI v1.0 (Rev. 3) 2016.4 - Patch updates for the UHD-SDI IP in Vivado 2016.4 N/A N/A
68754 LogiCORE IP SMPTE UHD-SDI v1.0 (Rev. 3) 2016.4 - Why does the rx_mode_locked and rx_t_locked keep toggling when the SDI cable is not connected? N/A N/A
68794 LogiCORE IP SMPTE UHD-SDI v1.0 (Rev. 3) 2016.4 - UHD-SDI core shows Timing Errors on EDH TX paths N/A N/A
67862 LogiCORE IP SMPTE UHD-SDI v1.0 (Rev. 3) - Why am I not able to properly detect 1920x1080 @ 40/48fps (either 3G or 6G) or 3840x2160 @ 48fps (12G) inputs? N/A N/A
62645 LogiCORE IP SMPTE SD/HD/3G-SDI (SMPTE SDI), SMPTE UHD-SDI IP, SMPTE UHD-SDI Rx/Tx Subsystem - Can non-standard resolutions be supported? N/A N/A
AR# 54547
Date 07/03/2018
Status Active
Type Release Notes
IP
  • SMPTE UHD-SDI
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