AR# 54760


Zynq-7000 SoC - Booting a Zynq-7000 SoC Device


This answer record is a documentation map providing information about booting a Zynq-7000 SoC device.

It links to documents which cover different modes and configurations for booting a Zynq-7000 device using your boot interface of choice.

Note: This answer record is part of the Xilinx Zynq-7000 SoC Solution Center (Xilinx Answer 52512)

The Xilinx Zynq-7000 SoC Solution Center is available to address all questions related to Zynq-7000 SoC.

Whether you are starting a new design with Zynq-7000 SoC or troubleshooting a problem, use the Zynq-7000 SoC Solution Center to guide you to the right information.


UG1046 UltraFast Embedded Design Methodology Guide now contains all of the information about booting a Zynq-7000 SoC device.

Boot Flows and Concepts (FSBL, image creation through BootGEN, multiboot and fallback mechanisms) are described in chapters 6 and 32 of (UG585) Zynq-7000 SoC Technical Ref. Manual and chapter 3 and appendix A of UG821 Zynq-7000 SoC Software Developers Guide.

Below are some more Xilinx Answers relevant for Boot and Configuration. 
Primary Boot Devices
Zynq-7000 SoC supports Quad-SPI, NAND, NOR and SD as primary boot interfaces.

(Xilinx Answer 50991) contains details about which memory vendors and devices families are tested and supported by Xilinx.
Boot Times for Zynq-7000 Devices 
(Xilinx Answer 55572) Zynq-7000 SoC: Boot Times using NAND / QSPI
Considerations on large QSPI devices
(Xilinx Answer 57900) Zynq-7000 SoC - Boot Image requirements when using larger than 16MB QSPI and RSA Authentication
(Xilinx Answer 60803) Zynq-7000 SoC - Boot Image requirements when using larger than 16MB QSPI with optional Execute-in-Place (XIP) mode
(Xilinx Answer 59518) Zynq-7000 SoC: QSPI boot time consideration with larger QSPI memory
(Xilinx Answer 54760) Design Advisory for Zynq-7000 SoC - Zynq and QSPI reset requirements when using flash larger than 16MB
Secure and Non-Secure Boot and Configuration
(Xilinx Answer 54825) Zynq-7000 SoC - Non-Secure Boot and Configuration
  • Booting Bare Metal
  • Single Core Boot and Configuration
  • AMP: Linux/Bare Metal Boot and Configuration
  • Partial Reconfiguration
  • Booting Linux
  • Using U-Boot
  • AMP: Linux/Free RTOS Boot
  • Partial Reconfiguration
  • 2nd (SSBL) and subsequent Stage Booting
(Xilinx Answer 54827) Zynq-7000 SoC - Secure Boot and Configuration
  • eFUSE and BBRAM for Secure Boot
  • XAPPs and White Papers
Creating and Programming Boot Flash Sources
(Xilinx Answer 54832) Zynq-7000: SoC - Creating Boot Images and Programming Boot Flash Sources
  • Creating boot images using BootGen
  • Creating a PCIe tandem boot image
  • Programming Flash Devices
  • Programming with U-Boot
  • Programming with iMPACT
  • Programming with SDK
(Xilinx Answer 54833) Zynq-7000 SoC - PCIe Tandem Boot
  • Configuring PCIe and Booting Linux in Non-Secure Mode

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
52538 Zynq-7000 SoC - Boot and Configuration N/A N/A

Child Answer Records

AR# 54760
Date 05/29/2018
Status Active
Type General Article
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