AR# 54811

Description

I have configured the axi_intc core with Fast Interrupt Mode.

It appears that the intermediate updates in the IVAR register will reset the IPIER bits.

Is this a known issue?

Solution

This is a known issue. 

Please follow the steps below to work around this issue. 

This will be fixed in a future release of the core.

1. Open ISE Design Suite 14.4.
 
2. Copy axi_intc_v1_03_a from the pcore into a local directory.
 
3. Open the intc_core.vhd file in edit mode.
 
4. Search for the instance (IER_BIT_P) in RTL.

Change the following:

if ((Rst_n = RESET_ACTIVE) or (cie(i) = '1') or (write_ivar = '1')) then

To

if ((Rst_n = RESET_ACTIVE) or (cie(i) = '1') ) then

5. Save the file.