AR# 55115

Design Advisory Master Answer Record for Spartan-3A/3AN/3A DSP FPGAs


Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System. This answer record lists the Design Advisories that have been communicated for the Spartan-3A/3AN/3A DSP FPGA products.


Design Advisory Alerted on April 2, 2013

03/28/2013 (Xilinx Answer 55037) - Design Advisory for Spartan-3A and Spartan-6: After SelectMAP configuration, when Readback CRC is enabled and an ABORT is triggered, spurious failures might be flagged in Readback CRC

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AR# 55115
Date 03/28/2013
Status Active
Type Design Advisory