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  3. AR# 55150: 14.5 - EDK - SDK - Program FPGA while board is up and running causes suspension of SoC cores

AR# 55150

14.5 - EDK - SDK - Program FPGA while board is up and running causes suspension of SoC cores

Description

Programing FPGA (Xilinx Tools -> Program FPGA) while the board is running causes the suspension of the SoC cores.

What is the work-around for this issue?

Solution

To work around this issue follow the steps below:


  1. After the FPGA bitstream is downloaded successfully, Start "Debug Perspective" in SDK.

  2. Once in "Debug perspective", open "Debug Configurations".

  3. Create a new configuration under Xilinx_TCF.

  4. Click on Debug.

  5. One of the Cores will now be in a suspended state.

  6. Click Resume (F8), and the core will be in a running state again.
AR# 55150
Date 05/22/2014
Status Active
Type General Article
Devices
Tools
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