AR# 55359


LogiCORE DisplayPort v3.2 - Noise on the AUX Channel causes the Core AUX State Machine to Hang


Version Found: v3.2
Version Resolved and other Known Issues: See (Xilinx Answer 33258) for ISE and (Xilinx Answer 54522) for Vivado 2013.1 or later.

During power-up, it is possible that on a poorly terminated P/N AUX Channel input there will be some chatter at the output of the differential buffers. This chatter may cause the DisplayPort AUX channel state machine to hang because it was taken in as valid data.

This chatter should not exceed a 0.4 - 0.6 us Unit Interval which is the range defined by the VESA specification to be considered as valid data. However, the DisplayPort v3.2 core did not do filtering to check whether the signal transitions fall within this range before processing the information received.


The DisplayPort v3.2 Rev 2 patch and later includes an AUX channel noise filter. The noise filter has been added to both the DisplayPort Source and Sink cores.
For 7 series devices, it is recommended to upgrade to the latest core release available in Vivado tool. Newer core release after v3.2 core will have this patch built-in to the core.

How to Get and Use the Patch:
1) The DisplayPort v3.2 Rev2 or later patch can be found in (Xilinx Answers 53422).

2) Once the patch is installed and the DisplayPort core is re-generated, you will find a new register as shown below:

The above register is extended for specifying the noise filter width. Bits [15:8] (CFG_RX_AUX_SIGNAL_WIDTH_FILTER) are used to specify the noise filter width. Allowed values are:  16, 24, 32, 40 and 48. For any other values, the default behavior is maintained (i.e. the aux data should be stable for 8 AXI clock cycles).

If AXI clock freq= 60 MHZ and the required AUX clock is 1 MHz, the AUX_CLOCK_DIVIDER value should be 60 for this case:

    If kCFG_RX_AUX_SIGNAL_WIDTH_FILTER is set to 24, then the UI = 0.4 us
    If kCFG_RX_AUX_SIGNAL_WIDTH_FILTER is set to 32, then the UI = 0.53 us

Users can set these values based on the on the AXI clock frequency and the required Unit Interval.

Revision History:
4/3/2013 - Initial Release

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AR# 55359
Date 09/10/2013
Status Archive
Type General Article
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