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AR# 55368

7 Series FPGA GTP Transceiver - Generating cores in Transceiver Wizard v2.5 for CPRI/RXAUI protocols in the ISE 14.5/Vivado 2013.1 design tools

Description

This answer record describes how to generate the CPRI and RXAUI cores properly in the 7 Series FPGAs Transceivers wizard v2.5 for GTP transceiver in the ISE 14.5 and Vivado 2013.1 design tools.

Solution

The following steps must be followed to generate a core successfully. This issue will be fixed in the next version of the Wizard.

ISE 14.5 Design Suite

CPRI:

You will see Rx reference clock highlighted in red on page 1 and Tx Buffer Bypass mode Manual is highlighted in red on page 2.

In order to generate a valid core, perform the following: 

  1. Double-click on Tx reference clock value on Page 1.
  2. Double-click on Manual option for Tx Buffer Bypass mode on Page 2.
    This will remove the red highlight and you can proceed with core generation.


RXAUI:

Please use the Vivado 2013.1 tool to generate protocol wrapper for RXAUI using the following work-around.

Vivado 2013.1 Design Suite

CPRI:

You will see Tx Buffer Bypass mode Manual is highlighted in red in Encoding and Clocking Tab.

In order to generate a valid core, perform the following:

  1. Select Manual option for Tx Buffer Bypass mode.
  2. Select Align to Two Byte Boundaries in Comma Alignment and Equalization Tab.
 

RXAUI:

You will see Tx Buffer Bypass mode Manual is highlighted in red in Encoding and Clocking Tab.

In order to generate a valid core, you should select the Manual option for Tx Buffer Bypass mode. This will remove the red highlight and user can proceed with core generation.

AR# 55368
Date Created 04/03/2013
Last Updated 04/05/2013
Status Active
Type General Article
Devices
  • Artix-7
Tools
  • Vivado Design Suite - 2013.1
  • ISE Design Suite - 14.5
IP
  • 7 Series FPGAs Transceivers Wizard