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AR# 55515

Vivado Implementation [Drc 23-20] Rule violation (PDRC-139) SLICE_PairEqSame_A6A5_ERROR - Incompatible programming


 I have a Vivado design where I use a Synplify netlist and when I try to write a bitstream I receive the following drc error:


ERROR: [Drc 23-20] Rule violation (PDRC-139) SLICE_PairEqSame_A6A5_ERROR - Incompatible programming for cell SLICE_X302Y209. A6LUT and A5LUT must have a compatible equation, lower bits must be programmed the same.


Why is this happening?


This error can occur when using the pre-packing feature of Synplify and then running Implementation with Vivado. 

The lower 32 bits of these equations do not match. This is caused by the pre-packing feature.

This has been fixed in Vivado 2013.3 and we recommend updating to the latest software.

If this is not possible, you can work around thisby reloading the design. 

This can be done in the GUI by selecting "Generate Bitstream" when an implementation run has completed. 

Alternatively, this can be done in a batch flow by adding the following commands after route_design:

write_checkpoint test.dcp
read_checkpoint test.dcp

write_bitstream test.bit

AR# 55515
Date 09/03/2014
Status Active
Type Error Message
  • Virtex-7
  • Vivado Design Suite - 2012.4
  • Vivado Design Suite - 2013.1
  • Vivado Design Suite - 2013.2
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