This is a known issue to be fixed in a future release of the core.
To work around this issue, replace pcie_7x_v1_9_pipe_clock.v ( <core_name_pipe_clock.v>) in the 'Source' directory with the file attached at the end of this answer record after renaming the file according to the core name.
For asynchronous clocking, set PCIE_ASYNC_EN parameter to 'TRUE'.
Note: "Version Found" refers to the version where the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
05/17/2013 - Initial release
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