There is an intermittent issue that occurs in the PlanAhead tool that causes it to crash when selecting all ports of a design and placing the ports in a pin planning project using the "Place in Area" option.
The crash has been seen in a PlanAhead Virtex-5 FPGA project when adjusting the size of the rectangle after the ports have been placed.
This issue has been seen in the PlanAhead tool with the Virtex-5 FPGA design only.
Due to the intermittent nature and the unintended use model required to produce this crash, a fix is not planned for the PlanAhead tool.
To work around the issue, making a second attempt at placement should be successful. All work should be saved before attempting the port placement.