All current designs using 1) Production Silicon, and 2) -2GE or -3E speed grades must use the QPLL settings specified in this answer record.
Current designs with production silicon that are not speed grades -2GE or -3E can use default settings from Vivado Design Suite 2012.4 and above, or 7 Series Serial Tranceiver Wizard Version v2.4 in ISE Design Suite 14.4 and above.
All new designs using production silicon must use these settings for all speed grades. These GTH settings will be reflected in the Vivado Design Suite 2013.3 and 7 Series Serial Tranceiver Wizard v2.7 for the ISE 14.7 design tool. Note these settings are not backward compatible to General ES silicon. For GES, see (Xilinx Answer 51625).
Attribute | Value |
QPLL_CFG | 27'h04801C7 |
QPLL_LOCK_CFG | 16'h05E8 |
COMMON_CFG | 32'h0000001C |
Revision History
07/29/2013 - Initial release
AR# 56332 | |
---|---|
Date | 07/25/2013 |
Status | Active |
Type | Design Advisory |
Devices |