Please download the Debugging Guide for 7 Series Integrated PCI Express Block Link Training Issues which is attached in PDF format at the end of this answer record; file name is "Xilinx_Answer_56616_7_Series_PCIe_Link_Training_Debug_Guide.pdf".This document describes techniques to debug link training issues with 7 Series Integrated PCI Express Block. A complete list of signals to capture in ChipScope Pro/Vivado ILA when debugging link training issues has been provided. Screen captures of the signal waveforms illustrate how to analyze those signals and establish theories on potential reasons causing the problem. One of the main reasons behind running into the link training issue is due to the Signal Integrity (SI) issue on the board. A general guideline of things to check has been provided to debug probable issues due to SI.
|Name||File Size||File Type|
|Debugging Guide for 7-Series Integrated PCI Express Block Link Training Issues||5 MB|