It has been seen that when using DisplayPort v3.2 Rev 6 core, there is a condition where the Sink core might lock up during write/read transaction.
In DisplayPort Rev 6 patch (Core version register reads 03020600), there is an added function to allow the "DEFER" transaction to be "STOP" when it exceeds the packet "live" time limit (timeout is typically for 1s).
Part of this added function contains a redundant check that was in the core originally causing a lock-up condition when both checks are triggered at the same time.
Note: This issue will not occur if using DisplayPort core other than v3.2 with Rev 6 patch.
There is a v3.2 rev7 patch available; see (Xilinx Answer 53422).
This fix will be available in next version of the LogiCORE DisplayPort core. If you need a patch for the DisplayPort v3.2, please contact the Xilinx Technical Support.
Please see (Xilinx Answer 33258) for a detailed list of LogiCORE IP DisplayPort Release Notes and Known Issues.
7/15/2013 - Initial release