We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 56700

2013.2 Vivado IP Simulation - Error: [VRFC 10-950] instantiating from unknown module [tb.v 156]


When running behavioral simulation for an IP in Vivado, the following error occurs. What is the problem?

Error: [VRFC 10-950] instantiating <xxx> from unknown module <blk_mem_gen_0> [tb.v 156]


This error occurs because the simulation model file for this IP is not added to the design sources.

When generating an IP, the "Simulation" option in the "Generation" tab in the IP Project Settings needs to be checked for the simulation model files to be generated. Otherwise there are no files available for simulation.

IP project settings.png
IP project settings.png

Linked Answer Records

Master Answer Records

AR# 56700
Date 04/02/2015
Status Active
Type General Article
  • Vivado Design Suite - 2013.2
Page Bookmarked