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AR# 56736

Zynq-7000 AP SoC, 14.6 - The FSBL hangs during boot when DDR-ECC is enabled


The FSBL hangs during boot when DDR-ECC is enabled.

Nothing gets printed out to the terminal even if FSBL_DEBUG_INFO is defined in fsbl_debug.h.


The issue exists in the ps7_init.c file: #define PS7_MASK_POLL_TIME 100000

The PS7_MASK_POLL_TIME given in the ps7_init.c file is not sufficient for the poll DMA done operation.

This is taking more time than the given value. It returned the 4 when debugged through SDK which is an error code for the poll DMA operation.

The work-around is to #define PS7_MASK_POLL_TIME 1000000000. The system works fine with this value.

AR# 56736
Date 07/11/2013
Status Active
Type Known Issues
  • Zynq-7000
  • EDK - 14.6
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