problem description: The speed grades listed for the XC4000XLA family in FPGA Express 3.1 are incorrect. The problem translates to the project manager when synthesizing; the user will not be able to select the correct speed grades.
Modify the XC4000XLA.PTS file in the %XILINX%\synth\lib directory. Open this file in your favorite text editor and replace all "xl-1" and "xl-2" instances with "xl-07" and "xl-08". Once this file is modified, the valid speed files will be available in the project Manager.