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AR# 56894

7 Series GTX/GTH/GTP Transceivers - DFE/LPM Optimized Settings for Non-scrambled Signal

Description

7 series RX equalizers can adapt automatically to the signal thanks to the built-in adaptation logic.

This allows a simple and optimal configuration of the receiver for minimal BER in most of the applications.

However, the adaptation logic is best suited for random signals and some care must be taken when the signal is not scrambled.

This answer record summarizes the test results and suggested actions to improve the performance in the case of non-scrambled signals with DFE for 7 series transceivers.

Solution

LPM mode

  • GTX LPM is robust to non-scrambled pattern; no particular action is required.
  • GTP LPM is robust to non-scrambled pattern; no particular action is required.
  • GTH LPM is robust to non-scrambled pattern; no particular action is required.

DFE mode

GTX DFE

  1. Follow the 7 series FPGAs GTX/GTH Transceivers User Guide (UG476) to set CTLE (Table 4-13: GTX Use Models for Channel Insertion Losses at Nyquist Frequency).
  2. Set RX_DFE_VP_CFG = 17'h00F00 to slow down the VP loop. This helps when the signal contains short sequences of repeating pattern, less than 3000 bits.
  3. DFE adaptation will drift from its ideal when too many repeating patterns are seen.
    For a robust solution, add logic in the fabric that will keep track of how many repeating patterns are seen.
    When this exceeds 3000 bits of repeating pattern, then assert the *HOLD ports of UT, H2-H5.
    This will hold the adapt values from drifting. Once more random patterns are seen, de-assert the *HOLD.
  4. Please be sure that RXDFEXYDEN = 1.


GTH DFE

  1. In order to make DFE adaptation more robust to sequences of repeating pattern of less than 4000 bits, set RX_DFE_VP_CFG = 17'h00AA0.
  2. DFE adaptation will drift from its ideal when too many repeating patterns are seen.
    For a robust solution, add logic in the fabric that will keep track of how many repeating patterns are seen.
    When this exceeds 4000 bits of repeating pattern, then assert the *HOLD ports of UT, H2-H7. This will hold the adapt values from drifting.
    Once more random patterns are seen, de-assert the *HOLD.
  3. Please be sure that RXDFEXYDEN = 1.
AR# 56894
Date Created 07/26/2013
Last Updated 06/11/2015
Status Active
Type General Article
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7