Version Found: v2.1
Version Resolved and other Known Issues: (Xilinx Answer 54645)
The FIRST_VF_OFFSET is calculated by subtracting the associated PF ID from VF ID.
FIRST_VF_OFFSET = VF ID - associated PF ID.
The FIRST_VF_OFFSET for PF0 is always at 64. VF ID for the first VF is 64 and PF0 ID is 0. Therefore, FIRST_VF_OFFSET for PF0 is = (VF ID - associated PF ID) = 64 - 0 = 64.
For PF1, the FIRST_VF_OFFSET is calculated in the same way.
FIRST_VF_OFFSET for PF1 is = (VF ID of the first VF attached to the PF1 - associated PF ID) = (VF ID of the first VF attached to PF1 - 1).
For example, if four VFs are attached to PF0 and two VFs are attached to PF1, the VF IDs will be:
VF0 - 64 ( attached to PF0 )
VF1 - 65 ( attached to PF0 )
VF2 - 66 ( attached to PF0 )
VF3 - 67 ( attached to PF0 )
VF4 - 68 ( attached to PF1 )
VF5 - 69 ( attached to PF1 )
FIRST_VF_OFFSET for PF1 is calculated as (68-1 = 67). However, when generating the Virtex-7 FPGA Gen3 Integrated Block for PCI Express v2.1 core, this value is incorrectly set to 68.
This is a known issue that is scheduled to be fixed in a future release of the core.
To work around this issue, set the attribute PF1_SRIOV_VF_OFFSET to the correct value in the source file.
08/04/2013 - Initial release
12/18/2013 - Added note regarding the issue in v2.2