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AR# 57168

2013.2 Vivado IP Flows - Assigning Zynq AXI_PCIe BAR1 address results in "ERROR: [BD 41-1202] <0x76000000[ 64K ]> is not within the addressable range..."

Description

I have a Zynq Vivado IP Integrator (IPI) design with AXI_PCIe connected to GP1 port. After configuring AXI_PCIe to 2 AXI BARs, I try to assign address to BAR1 in Address Editor, but the following error occurs:

ERROR: [BD 41-1202] <0x76000000[ 64K ]> is not within the addressable range <0x80000000[ 1G ]> of </axi_pcie/S_AXI/BAR1>
ERROR: [BD 5-48] Error: running assign_bd_address. ERROR: [Common 17-39] 'assign_bd_address' failed due to earlier errors.

I expected the tool to automatically assign an address within the range of 0x8000_0000 to 0xbfff_ffff; which is the range for GP1 port. For BAR0, everything works as expected.

Solution

You can use one of the following methods to work around this issue:

  • Work-around 1

    Drag the /axi_pcie/S_AXI over the /axi_pcie/M_AXI branch below, or the manual assign_bd_address command is:
    assign_bd_address [get_bd_addr_segs {/axi_pcie/S_AXI/BAR1 }] -target_address_space /axi_pcie/M_AXI
    This will force the assignment, even to an overlapping address.
  • Work-around 2

    Step 1: In vivado tcl, create_bd_addr_seg -range 0x2000 -offset 0xA0000000 [get_bd_addr_spaces ps/Data] [get_bd_addr_segs {/axi_pcie/S_AXI/BAR1}] SEG0

    Step 2: right-click BAR1; and then Assign Address.
  • Work-around 3

    Step 1: in vivado tcl, create_bd_addr_seg -range 0x2000 -offset 0xA0000000 [get_bd_addr_spaces ps/Data] [get_bd_addr_segs {/axi_pcie/S_AXI/BAR1}] SEG0

    Step 2: assign_bd_address [get_bd_addr_segs {/axi_pcie/S_AXI/BAR1 }]

    You can then modify the offset and high address in the Address Editor.


This issue is resolved in the Vivado 2013.3 tool.

AR# 57168
Date Created 08/20/2013
Last Updated 01/13/2014
Status Active
Type General Article
Devices
  • Zynq-7000
Tools
  • Vivado Design Suite - 2013.2
IP
  • AXI PCI Express (PCIe)